1. Technical Field
The embodiments herein generally relate to wireless communication devices, and more particularly to amplification of desired signals and filtering of undesired blocker signals in a signal band.
2. Description of the Related Art
In wireless communication systems, a desired signal in a channel of interest may be very weak due to very strong blockers in nearby channels. In order to increase the strength of the desired signal, the desired signal is to be amplified and the unwanted blocker signals in the nearby adjacent channels are filtered by high order filtering. An amplifier has to amplify the desired signal and reject the blockers and other out of band signals. For best dynamic range performance, gain and filtering should be interleaved. For best linearity of a signal, the out of band signals should be filtered first by a filter and then amplified by an amplifier.
For best noise performance, the signal is amplified first by the amplifier and then subsequently filtered by the filter. There are many ways to implement higher order filters using these two techniques. However, both techniques suffer from a limited noise performance. The main reason for this is that the active and passive components employed in both techniques are in the signal path. The active circuitry of the existing filter topologies is directly in the signal path and contributes to more noise. Thus, they directly add noise to the signal at all frequencies.
Additionally, if the filter precedes the amplifier, reducing its noise would require large chip area and power consumption. Further, the amplifier gain will be limited by the large blocker signals. Hence, a fundamental trade-off exists between cascading filter and amplification stages. Additionally, the filtering active circuitry in the signal path introduces DC offsets that cause the amplification blocks to clip. The active circuitry in the signal path can also cause I/Q imbalance which might degrade the receiver performance.
Thereby, the existing gain-filtering topologies require very large chip area and power consumption to achieve a low noise operation, while degrading I-Q matching and adding DC offsets. Hence, using classical gain filtering interleaved architectures to realize post down-conversion mixer low noise filter leads to an unacceptable power and area penalties. Therefore, the existing solutions achieve the amplification of the desired signal and rejection of the blockers with the cost of additional noise. Also, the components in the filtering section contribute DC-offsets to the signal path.